[TARGET]
Name=r5f5210a
[LINK]
##	link command file for RX210 768K
##	Copyright (c) 2014 by COSMIC Software
##
+seg .sconst -b 0xfff40000 -o0 -m 0x10000 -n .sconst -r2	# based constants
+seg .const -a .sconst -o0 -m 0xbffd0 -n .const			# standard constants
+seg .text -a .const -n .text -r0			# program follows constants
+seg .sdata -b 0 -m 0x10000 -n .sdata -r2 -id		# sdata start address
+seg .sbss -a .sdata -n .sbss				# sbss follows sdata
+seg .bss -a .sbss -m 0x18000 -n .bss			# bss follows sbss
+seg .data -a .bss -n .data 				# data follows bss
+seg .eeprom -b 0x100000 -m 0x2000 -n .eeprom -r2	# data flash

## startup file
#if defined(__STP_CRTS__)
"crts.rx"
#elif defined(__STP_CRTSI__)
"crtsi.rx"
#endif

## application files
+spc .sdata=4			# no data object at address 0
__STP_FILES__

## libraries
#if defined(__OPT_PMODS__)
#if defined(__STP_FLOAT__)
#if defined(__OPT_PSPREC__)
"libfs.rx"
#else
"libds.rx"
#endif
#endif
"libis.rx"			# C library (if needed)
#elif defined(__OPT_PMODSC__)
#if defined(__STP_FLOAT__)
#if defined(__OPT_PSPREC__)
"libfsc.rx"
#else
"libdsc.rx"
#endif
#endif
"libisc.rx"			# C library (if needed)
#elif defined(__OPT_PMODL__)
#if defined(__STP_FLOAT__)
#if defined(__OPT_PSPREC__)
"libfl.rx"
#else
"libdl.rx"
#endif
#endif
"libil.rx"			# C library (if needed)
#else
#if defined(__STP_FLOAT__)
#if defined(__OPT_PSPREC__)
"libflc.rx"
#else
"libdlc.rx"
#endif
#endif
"libilc.rx"			# C library (if needed)
#endif
"libm.rx"			# machine library

## interrupt vectors
+seg .vector -b 0xffffffd0 -n .vector	# vectors start address
#if defined(__STP_VECTOR__)
"vector.o"
#if defined(__OPT_PSPLIT__)
-k
#endif
#endif

## symbols
+def __stack=0x18000			# stack pointer initial value
+def __sbss=pstart(.sbss)		# start address of bss
+def __ebss=pend(.bss)			# end address of bss
+def __memory=pend(.data)		# heap start address
+def __sdata=pstart(.sdata)		# start of based data
+def __sconst=pstart(.sconst)		# start of based constants
[VECTOR]
/*	INTERRUPT VECTORS TABLE RX210 FAMILY
 *	Copyright (c) 2014 by COSMIC Software
 */
void _stext(void);		/* startup routine */

/*	Relocatable Vector Table
 */
void (* const _vectab[])(void) = {
	0,0,0,0,0,0,0,0,	/* reserved     */
	0,0,0,0,0,0,0,0,	/* reserved     */
	0,			/* Bus Error    */
	0,0,0,0,		/* reserved     */
	0,			/* FIFERR       */
	0,			/* reserved     */
	0,			/* FRDYI        */
	0,0,0,			/* reserved     */
	0,			/* SWINT        */
	0,			/* CMI0         */
	0,			/* CMI1         */
	0,			/* CMI2         */
	0,			/* CMI3         */
	0,			/* FERRF        */
	0,			/* MENDF        */
	0,			/* OVFF         */
	0,0,0,0,0,0,0,0,	/* reserved     */
	0,			/* reserved     */
	0,			/* RSPI0 SPEI0  */
	0,			/* RSPI0 SPRI0  */
	0,			/* RSPI0 SPTI0  */
	0,			/* RSPI0 SPII0  */
	0,0,0,0,0,0,0,0,	/* reserved     */
	0,			/* reserved     */
	0,			/* DOPCF        */
	0,			/* CMPB0        */
	0,			/* CMPB1        */
	0,0,0,			/* reserved     */
	0,			/* RTC CUP      */
	0,			/* IRQ0         */
	0,			/* IRQ1         */
	0,			/* IRQ2         */
	0,			/* IRQ3         */
	0,			/* IRQ4         */
	0,			/* IRQ5         */
	0,			/* IRQ6         */
	0,			/* IRQ7         */
	0,0,0,0,0,0,0,0,	/* reserved     */
	0,0,0,0,0,0,0,0,	/* reserved     */
	0,			/* CMPA1        */
	0,			/* CMPA2        */
	0,0,			/* reserved     */
	0,			/* RTC ALM      */
	0,			/* RTC PRD      */
	0,0,0,0,0,0,0,0,	/* reserved     */
	0,			/* S12ADI0      */
	0,			/* GBADI        */
	0,0,			/* reserved     */
	0,			/* ELSR18I      */
	0,			/* ELSR19I      */
	0,0,0,0,0,0,		/* reserved     */
	0,			/* MTU0 TGIA0   */
	0,			/* MTU0 TGIB0   */
	0,			/* MTU0 TGIC0   */
	0,			/* MTU0 TGID0   */
	0,			/* MTU0 TGIV0   */
	0,			/* MTU0 TGIE0   */
	0,			/* MTU0 TGIF0   */
	0,			/* MTU1 TGIA1   */
	0,			/* MTU1 TGIB1   */
	0,			/* MTU1 TGIV1   */
	0,			/* MTU1 TGIU1   */
	0,			/* MTU2 TGIA2   */
	0,			/* MTU2 TGIB2   */
	0,			/* MTU2 TGIV2   */
	0,			/* MTU2 TGIU2   */
	0,			/* MTU3 TGIA3   */
	0,			/* MTU3 TGIB3   */
	0,			/* MTU3 TGIC3   */
	0,			/* MTU3 TGID3   */
	0,			/* MTU3 TGIV3   */
	0,			/* MTU4 TGIA4   */
	0,			/* MTU4 TGIB4   */
	0,			/* MTU4 TGIC4   */
	0,			/* MTU4 TGID4   */
	0,			/* MTU4 TGIV4   */
	0,			/* MTU5 TGIU5   */
	0,			/* MTU5 TGIV5   */
	0,			/* MTU5 TGIW5   */
	0,			/* TPU0 TGI0A   */
	0,			/* TPU0 TGI0B   */
	0,			/* TPU0 TGI0C   */
	0,			/* TPU0 TGI0D   */
	0,			/* TPU0 TGI0V   */
	0,			/* TPU1 TGI1A   */
	0,			/* TPU1 TGI1B   */
	0,			/* TPU1 TGI1V   */
	0,			/* TPU1 TGI1U   */
	0,			/* TPU2 TGI2A   */
	0,			/* TPU2 TGI2B   */
	0,			/* TPU2 TGI2V   */
	0,			/* TPU2 TGI2U   */
	0,			/* TPU3 TGI3A   */
	0,			/* TPU3 TGI3B   */
	0,			/* TPU3 TGI3C   */
	0,			/* TPU3 TGI3D   */
	0,			/* TPU3 TGI3V   */
	0,			/* TPU4 TGI4A   */
	0,			/* TPU4 TGI4B   */
	0,			/* TPU4 TGI4V   */
	0,			/* TPU4 TGI4U   */
	0,			/* TPU5 TGI5A   */
	0,			/* TPU5 TGI5B   */
	0,			/* TPU5 TGI5V   */
	0,			/* TPU5 TGI5U   */
	0,0,			/* reserved     */
	0,			/* POE OEI1     */
	0,			/* POE OEI2     */
	0,0,			/* reserved     */
	0,			/* TMR0 CMIA0   */
	0,			/* TMR0 CMIB0   */
	0,			/* TMR0 OVI0    */
	0,			/* TMR1 CMIA1   */
	0,			/* TMR1 CMIB1   */
	0,			/* TMR1 OVI1    */
	0,			/* TMR2 CMIA2   */
	0,			/* TMR2 CMIB2   */
	0,			/* TMR2 OVI2    */
	0,			/* TMR3 CMIA3   */
	0,			/* TMR3 CMIB3   */
	0,			/* TMR3 OVI3    */
	0,			/* SCI2 ERI2    */
	0,			/* SCI2 RXI2    */
	0,			/* SCI2 TXI2    */
	0,			/* SCI2 TEI2    */
	0,			/* SCI3 ERI3    */
	0,			/* SCI3 RXI3    */
	0,			/* SCI3 TXI3    */
	0,			/* SCI3 TEI3    */
	0,			/* SCI4 ERI4    */
	0,			/* SCI4 RXI4    */
	0,			/* SCI4 TXI4    */
	0,			/* SCI4 TEI4    */
	0,			/* DMACI0       */
	0,			/* DMACI1       */
	0,			/* DMACI2       */
	0,			/* DMACI3       */
	0,0,0,0,		/* reserved     */
	0,			/* SCI7 ERI7    */
	0,			/* SCI7 RXI7    */
	0,			/* SCI7 TXI7    */
	0,			/* SCI7 TEI7    */
	0,			/* SCI10 ERI10  */
	0,			/* SCI10 RXI10  */
	0,			/* SCI10 TXI10  */
	0,			/* SCI10 TEI10  */
	0,			/* SCI0 ERI0    */
	0,			/* SCI0 RXI0    */
	0,			/* SCI0 TXI0    */
	0,			/* SCI0 TEI0    */
	0,			/* SCI1 ERI1    */
	0,			/* SCI1 RXI1    */
	0,			/* SCI1 TXI1    */
	0,			/* SCI1 TEI1    */
	0,			/* SCI5 ERI5    */
	0,			/* SCI5 RXI5    */
	0,			/* SCI5 TXI5    */
	0,			/* SCI5 TEI5    */
	0,			/* SCI6 ERI6    */
	0,			/* SCI6 RXI6    */
	0,			/* SCI6 TXI6    */
	0,			/* SCI6 TEI6    */
	0,			/* SCI8 ERI8    */
	0,			/* SCI8 RXI8    */
	0,			/* SCI8 TXI8    */
	0,			/* SCI8 TEI8    */
	0,			/* SCI9 ERI9    */
	0,			/* SCI9 RXI9    */
	0,			/* SCI9 TXI9    */
	0,			/* SCI9 TEI9    */
	0,			/* SCI12 ERI12  */
	0,			/* SCI12 RXI12  */
	0,			/* SCI12 TXI12  */
	0,			/* SCI12 TEI12  */
	0,			/* SCIX0        */
	0,			/* SCIX1        */
	0,			/* SCIX2        */
	0,			/* SCIX3        */
	0,			/* RIIC0 EEI0   */
	0,			/* RIIC0 RXI0   */
	0,			/* RIIC0 TXI0   */
	0,			/* RIIC0 TEI0   */
	0,			/* SCI11 ERI11  */
	0,			/* SCI11 RXI11  */
	0,			/* SCI11 TXI11  */
	0,			/* SCI11 TEI11  */
	0,0,			/* reserved     */
	};

#pragma section const {vector}

/*	Fixed Vector Table
 */
void (* const _fvectab[])(void) = {		/* 0xFFFFFFD0 */
	0,			/* Privileged instruction */
	0,			/* Access                 */
	0,			/* reserved               */
	0,			/* Undefined instruction  */
	0,			/* reserved               */
	0,			/* Floating point         */
	0,			/* reserved               */
	0,			/* reserved               */
	0,			/* reserved               */
	0,			/* reserved               */
	0,			/* Non maskable interrupt */
	_stext,			/* Reset                  */
	};
[OPTION]
+modlc