[TARGET]
Name=r5f563tb
[LINK]
##	link command file for RX63T 256K
##	Copyright (c) 2014 by COSMIC Software
##
+seg .sconst -b 0xfffc0000 -o0 -m 0x10000 -n .sconst -r2	# based constants
+seg .const -a .sconst -o0 -m 0x3ffd0 -n .const			# standard constants
+seg .text -a .const -n .text -r0			# program follows constants
+seg .sdata -b 0 -m 0x6000 -n .sdata -r2 -id		# sdata start address
+seg .sbss -a .sdata -n .sbss				# sbss follows sdata
+seg .bss -a .sbss -n .bss				# bss follows sbss
+seg .data -a .bss -n .data 				# data follows bss
+seg .eeprom -b 0x100000 -m 0x8000 -n .eeprom -r2	# data flash

## startup file
#if defined(__STP_CRTS__)
"crts.rx"
#elif defined(__STP_CRTSI__)
"crtsi.rx"
#endif

## application files
+spc .sdata=4			# no data object at address 0
__STP_FILES__

## libraries
#if defined(__OPT_PMODS__)
#if defined(__STP_FLOAT__)
#if defined(__OPT_PSPREC__)
"libfs.rx"
#else
"libds.rx"
#endif
#endif
"libis.rx"			# C library (if needed)
#elif defined(__OPT_PMODSC__)
#if defined(__STP_FLOAT__)
#if defined(__OPT_PSPREC__)
"libfsc.rx"
#else
"libdsc.rx"
#endif
#endif
"libisc.rx"			# C library (if needed)
#elif defined(__OPT_PMODL__)
#if defined(__STP_FLOAT__)
#if defined(__OPT_PSPREC__)
"libfl.rx"
#else
"libdl.rx"
#endif
#endif
"libil.rx"			# C library (if needed)
#else
#if defined(__STP_FLOAT__)
#if defined(__OPT_PSPREC__)
"libflc.rx"
#else
"libdlc.rx"
#endif
#endif
"libilc.rx"			# C library (if needed)
#endif
"libm.rx"			# machine library

## interrupt vectors
+seg .vector -b 0xffffffd0 -n .vector	# vectors start address
#if defined(__STP_VECTOR__)
"vector.o"
#if defined(__OPT_PSPLIT__)
-k
#endif
#endif

## symbols
+def __stack=0x6000			# stack pointer initial value
+def __sbss=pstart(.sbss)		# start address of bss
+def __ebss=pend(.bss)			# end address of bss
+def __memory=pend(.data)		# heap start address
+def __sdata=pstart(.sdata)		# start of based data
+def __sconst=pstart(.sconst)		# start of based constants
[VECTOR]
/*	INTERRUPT VECTORS TABLE RX63T FAMILY
 *	Copyright (c) 2014 by COSMIC Software
 */
void _stext(void);		/* startup routine */

/*	Relocatable Vector Table
 */
void (* const _vectab[])(void) = {
	0,0,0,0,0,0,0,0,	/* reserved     */
	0,0,0,0,0,0,0,0,	/* reserved     */
	0,			/* Bus Error    */
	0,0,0,0,		/* reserved     */
	0,			/* FIFERR       */
	0,			/* reserved     */
	0,			/* FRDYI        */
	0,0,0,			/* reserved     */
	0,			/* SWINT        */
	0,			/* CMI0         */
	0,			/* CMI1         */
	0,			/* CMI2         */
	0,			/* CMI3         */
	0,			/* reserved     */
	0,			/* USB0 D0FIFO0 */
	0,			/* USB0 D1FIFO0 */
	0,			/* USBI0        */
	0,			/* CAC FERRF    */
	0,			/* CAC MENDF    */
	0,			/* CAC OVFF     */
	0,			/* RSPI0 SPRI0  */
	0,			/* RSPI0 SPTI0  */
	0,			/* RSPI0 SPII0  */
	0,			/* RSPI1 SPRI1  */
	0,			/* RSPI1 SPTI1  */
	0,			/* RSPI1 SPII1  */
	0,			/* CAN1 RXF1    */
	0,			/* CAN1 TXF1    */
	0,			/* CAN1 RXM1    */
	0,			/* CAN1 TXM1    */
	0,			/* GTCIA7       */
	0,			/* GTCIB7       */
	0,			/* GTCIC7       */
	0,			/* GTCIE7       */
	0,			/* GTCIV7       */
	0,			/* CMP4         */
	0,			/* CMP5         */
	0,			/* CMP6         */
	0,			/* DOPCF        */
	0,			/* DPC RBI0     */
	0,			/* DPC RBI1     */
	0,			/* DPC RBI2     */
	0,			/* DPC RBI3     */
	0,			/* DPC RBI4     */
	0,			/* reserved     */
	0,			/* IRQ0         */
	0,			/* IRQ1         */
	0,			/* IRQ2         */
	0,			/* IRQ3         */
	0,			/* IRQ4         */
	0,			/* IRQ5         */
	0,			/* IRQ6         */
	0,			/* IRQ7         */
	0,0,0,0,0,0,0,0,	/* reserved     */
	0,0,0,0,0,0,0,0,	/* reserved     */
	0,0,			/* reserved     */
	0,			/* USBR0        */
	0,0,0,0,0,0,0,		/* reserved     */
	0,			/* ADI0         */
	0,0,0,			/* reserved     */
	0,			/* S12ADI0      */
	0,			/* S12GBADI0    */
	0,			/* S12ADI1      */
	0,			/* S12GBADI1    */
	0,			/* GROUP0       */
	0,0,0,0,0,0,0,		/* reserved     */
	0,			/* GROUP12      */
	0,0,0,0,0,0,0,		/* reserved     */
	0,			/* SCI12 SCIX0  */
	0,			/* SCI12 SCIX1  */
	0,			/* SCI12 SCIX2  */
	0,			/* SCI12 SCIX3  */
	0,			/* MTU0 TGIA0   */
	0,			/* MTU0 TGIB0   */
	0,			/* MTU0 TGIC0   */
	0,			/* MTU0 TGID0   */
	0,			/* MTU0 TGIV0   */
	0,			/* MTU0 TGIE0   */
	0,			/* MTU0 TGIF0   */
	0,			/* MTU1 TGIA1   */
	0,			/* MTU1 TGIB1   */
	0,			/* MTU1 TGIV1   */
	0,			/* MTU1 TGIU1   */
	0,			/* MTU2 TGIA2   */
	0,			/* MTU2 TGIB2   */
	0,			/* MTU2 TGIV2   */
	0,			/* MTU2 TGIU2   */
	0,			/* MTU3 TGIA3   */
	0,			/* MTU3 TGIB3   */
	0,			/* MTU3 TGIC3   */
	0,			/* MTU3 TGID3   */
	0,			/* MTU3 TGIV3   */
	0,			/* MTU4 TGIA4   */
	0,			/* MTU4 TGIB4   */
	0,			/* MTU4 TGIC4   */
	0,			/* MTU4 TGID4   */
	0,			/* MTU4 TGIV4   */
	0,			/* MTU5 TGIU5   */
	0,			/* MTU5 TGIV5   */
	0,			/* MTU5 TGIW5   */
	0,			/* MTU6 TGIA6   */
	0,			/* MTU6 TGIB6   */
	0,			/* MTU6 TGIC6   */
	0,			/* MTU6 TGID6   */
	0,			/* MTU6 TGIV6   */
	0,0,			/* reserved     */
	0,			/* MTU7 TGIA7   */
	0,			/* MTU7 TGIB7   */
	0,			/* MTU7 TGIC7   */
	0,			/* MTU7 TGID7   */
	0,			/* MTU7 TGIV7   */
	0,			/* POE OEI1     */
	0,			/* POE OEI2     */
	0,			/* POE OEI3     */
	0,			/* POE OEI4     */
	0,			/* POE OEI5     */
	0,			/* CMP0         */
	0,			/* CMP1         */
	0,			/* CMP2         */
	0,			/* GTCIA4       */
	0,			/* GTCIB4       */
	0,			/* GTCIC4       */
	0,			/* GTCIE4       */
	0,			/* GTCIV4       */
	0,			/* LOCOI4       */
	0,			/* GTCIA5       */
	0,			/* GTCIB5       */
	0,			/* GTCIC5       */
	0,			/* GTCIE5       */
	0,			/* GTCIV5       */
	0,			/* GTCIA6       */
	0,			/* GTCIB6       */
	0,			/* GTCIC6       */
	0,			/* GTCIE6       */
	0,			/* GTCIV6       */
	0,			/* RIIC1 EEI1   */
	0,			/* RIIC1 RXI1   */
	0,			/* RIIC1 TXI1   */
	0,			/* RIIC1 TEI1   */
	0,			/* RIIC0 EEI0   */
	0,			/* RIIC0 RXI0   */
	0,			/* RIIC0 TXI0   */
	0,			/* RIIC0 TEI0   */
	0,			/* DMACI0       */
	0,			/* DMACI1       */
	0,			/* DMACI2       */
	0,			/* DMACI3       */
	0,0,0,0,0,0,0,0,	/* reserved     */
	0,0,0,0,		/* reserved     */
	0,			/* SCI0 RXI0    */
	0,			/* SCI0 TXI0    */
	0,			/* SCI0 TEI0    */
	0,			/* SCI1 ERI1    */
	0,			/* SCI1 TXI1    */
	0,			/* SCI1 TEI1    */
	0,			/* SCI2 RXI2    */
	0,			/* SCI2 TXI2    */
	0,			/* SCI2 TEI2    */
	0,			/* SCI3 RXI3    */
	0,			/* SCI3 TXI3    */
	0,			/* SCI3 TEI3    */
	0,			/* GTCIA0       */
	0,			/* GTCIB0       */
	0,			/* GTCIC0       */
	0,			/* GTCIE0       */
	0,			/* GTCIV0       */
	0,			/* LOCOI0       */
	0,			/* GTCIA1       */
	0,			/* GTCIB1       */
	0,			/* GTCIC1       */
	0,			/* GTCIE1       */
	0,			/* GTCIV1       */
	0,			/* reserved     */
	0,			/* GTCIA2       */
	0,			/* GTCIB2       */
	0,			/* GTCIC2       */
	0,			/* GTCIE2       */
	0,			/* GTCIV2       */
	0,			/* reserved     */
	0,			/* GTCIA3       */
	0,			/* GTCIB3       */
	0,			/* GTCIC3       */
	0,			/* GTCIE3       */
	0,			/* GTCIV3       */
	0,			/* reserved     */
	0,			/* SCI12 ERI12  */
	0,			/* SCI12 TXI12  */
	0,			/* SCI12 TEI12  */
	0,0,0,			/* reserved     */
	};

#pragma section const {vector}

/*	Fixed Vector Table
 */
void (* const _fvectab[])(void) = {		/* 0xFFFFFFD0 */
	0,			/* Privileged instruction */
	0,			/* Access                 */
	0,			/* reserved               */
	0,			/* Undefined instruction  */
	0,			/* reserved               */
	0,			/* Floating point         */
	0,			/* reserved               */
	0,			/* reserved               */
	0,			/* reserved               */
	0,			/* reserved               */
	0,			/* Non maskable interrupt */
	_stext,			/* Reset                  */
	};
[OPTION]
+modsc